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src/m/y/MyHDL-based-FPGA-DSP-Toolflow-HEAD/Toolflow_Code/Old_HDFT_Code/DivideAndConquer.py   MyHDL-based-FPGA-DSP-Toolflow(Download)
    primarily works with the actor output and control signals. It calls the base Actor class transmitting method, and adds additional transmitting behaviour for the second output buffer.
    """
    baseclass_transmiting_inst = Actor.Actor.transmiting(self) #call the base class method transmitting method for the top output set
 
    output_enable = self.output_enable